The United States patent document U.S. Pat. No. 7,285,980 describes a system for multiplexing an integrated circuit pin that includes a plurality of registers for storing setting values for the configuration of the pin. A plurality of functions is to be multiplexed on said pin upon receiving the set values based on decoding the set values for selecting at least one of the functions. A plurality of pads is connected to the plurality of functions and the decoding logic. Thereby external pins act as inputs and/or outputs for the selected functionality depending upon the bit set values.
A problem of such devices is that when an error occurs in the setting of the configuration of the pins by said bit values, other devices coupled to said pins may get stuck or may even be damaged due to the incorrect configuration of the pins. The system in which such device is embedded may enter a potentially unsafe mode.